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2008 * Established China office.
* Receive a Singapore patent: Logic Analyzers data processing method.(SI.Pat.No.11740)
* Release the new model LAP-322000U-A.
* Exhibition : Hong Kong Electronics Fair 2008 (14-17 April)
* Exhibition : Taipei International Electronics Show 2008 (7-11 October)
* Exhibition : China Hi-Tech Fair ELEXCON 2008 (12-17 October)

2007 * Receive a Taiwan patent: Data Capture Method for Logic Analyzers and the application of restrictive clauses to capture the required data - TW.Pat.No.I271532 (delay of restrictive clauses)
* Release the Logic Analyzer LAP-B series.

2006 * Receive the 14th Taiwan Excellence Award.
* Sponsor the Second HOTTEK MUC Competition with the measure equipment.
* A Sponsor and judge for the second International Competition for the innovative design of digital signals.
* A sponsor and judge for the 2006 National and International Competition for the AI Chip of the Computer Mouse.
* LAP-A series becomes the designated testing equipment for the Single Chip Level C Certification Test.
* A record sale of more than 15M LAP-A series.
* Resolve the testing needs for manufacturers of motors and encoding machines and release professional testing software
* Receive the Certificate of Grant of Patent-Method of processing test date
* Receive a Taiwan patent: Logic analyzers with display features- TW.Pat.No.I267646 (3D-display)

2005 * Establish Instrument Division.
* Release the logic analyzer of the LAP-A series.
* Sell more than 500 LAP-A series.
* A sponsor and judge in the 2005 National and International Competition for the AI Chip of the Computer Mouse.
* The Gaming Division received USD$ 80,000 Receive Patent Authorization Fee of USD$80000 dollars from America.
* The gaming division received three patents from Taiwan, one from England, America and China, respectively.

2004 * Receive four patents in Taiwan.
* Relocate to a nearly purchased 400 sq office building in July.
* Receive a Taiwan patent: Data analysis method for programmable logic analyzers TW.Pat.No.I224195
* Receive a Taiwan patent: Data processing method for logic analyzers - TW.Pat.No.206912 (Data Zip)
* Receive a Taiwan patent: Serial Capture circuit for logic analyzers - TW.Pat.No.196254 (Serial Capture)
* Receive a Taiwan patent: Data Display for logic analyzers - TW.Pat.No.I244266 (Trigger Page)

2003 * Develop Zeroplus Logic Analyzer.
* Join the Industrial RD program by the Ministry of Economic Affairs-a new RD technology
promotion program for SMEs.
* Receive three patents in Taiwan and one from China.

 

 

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  Copyright © ZEROPLUS TECHNOLOGY CO., LTD. Address : 2F., No.123, Jian Ba Rd., Chung Ho City, Taipei County 235, Taiwan  TEL: 886-2-6620-2225  FAX: 886-2-2223-4362