Speed up embedded device driver development by spending just 250 EUR Being a freelancer and developing hardware concepts and device drivers for embedded RTOS systems running on ATMEL’s AT91SAM7X I really faced what you can do by just spending 250 EUR once per seat to speed up embedded device driver development. For a long time I managed all my tasks with my long term experience and the detailed user guide of the microcontroller with assistance of examples from the manufacturer and some forums. Then I started my SPI driver which makes extremely use of the DMA controller to save CPU cycles. It was a promising design that I was very proud of. But after some months my progress stopped completely. I wasn’t able to locate the problem – although I tested thoroughly: •Do I have a RTOS problem? •Is the hardware working properly? •Is my SPI driver code working properly? •Does my code for the SPI slave circuit transmit the proper data? Using a usual digital storage oscilloscope with a small amount of memory didn’t solve the puzzle. I have several transmissions over the SPI interface of the chip driven by its DMA controller. One of the slave circuits was not responding properly. With a basic DSO you usually have at your fingertips with some thousand memory points only, there was no chance to analyze the whole SPI transmission to see what’s happening there. Looking around for a good DSO with some mega-points of sample memory was very frustrating. Several thousand of EUROs need to be spent to have a good chance. For each seat. That was the time I’ve seen the products from ZEROPLUS. I got a bundle with a LAP 16128 device which offered me 16 channels plus triggering for a DSO (e.g. for additional signal quality checks) and last but not least the most helpful software equipped with several protocol analyzer plug-ins (and many other to purchase). This plug-ins interpret the data for you, so you never will count bits anymore. The patented compression technology of ZEROPLUS made it easy to analyze the whole SPI transmission a great resolution, although the small device I’ve chosen offers only 4Mbit of RAM. The problem was pictured in no time. I did connections to the chip select decoders input (3 wires instead of 8) and to the non-working slave at its /CS, SPCK, MOSI and MISO. Then I set the filter of the packet list to my chip select decoders inputs, activated the sync between list and logic view and moved thru by the packet list more:http://www.zeroplus.com.tw/logic-analyzer_tw/logo/Helmut%20Schoettner.pdf