SPI (Synchronous Peripheral Interface), is a parallel synchronous full duplex protocol with a bus-like physical interface. A complete SPI signal package must consist of SCK, MOSI, MISO, and SS segments with CPHA and CPOL.

 

	SPI Specification user-defined interface:

	SCK	Serial Clock Line (SCL).
	MOSI	Master data output, Slave data input (MOSI stands for Master-Out-Slave-In)
	MISO	Master data input, Slave data output (MISO stands for Master-In-Slave-Out)
	SS	SS stands for Signal Selector of the master device which is to select signals for the Slave devices.
	CPHA	the clock phase (CPHA) control bit selects one of the two fundamentally different transfer formats.
	CPOL	the clock polarity is specified by the CPOL control bit, which selects an active high or active low clock.

 

	Fig 4-35 – Clock Polarity and Phases